GitIgnore File for alteraquartusii

Create a .gitignore file to tell git which files or folders to ignore in your alteraquartusii project.

# Created by https://Shodkk.com/create-gitignore (Shantanu Bombatkar) SirDeploy Package
# It helps deploy fakeserver ReactApp on Heroku and Github Pages
#  Hope it helps || Thanks for Using SirDeploy Package

### AlteraQuartusII ###
##list taken from http://www.alterawiki.com/wiki/Version_Control (01.10.2015)

######### Quartus II source files

# project files:
### project_name.qpf Quartus II project file
### project_name.qsf Quartus constraint file (lists the hardware constraints defined for a project, from the used chip and pinout to timing constraints)
### project_name.qws Quartus Window Settings ? (the configuration of the Quartus gui for the project, may be omitted)

# top level source files:
### project_name.bdf Block diagram / Schematic file (top level schematic file, there may be many nested files)
### project_name.vhd VHDL file (top level VHDL file)
### project_name.v Verilog file (top level Verilog file)

# component source files:
### component_name.bsf Block Symbol file (component symbol file)
### component_name.vhd VHDL file (top level VHDL file)
### component_name.v Verilog file (top level Verilog file)

# SOPC builder project source files (SOPC builder creates many VHDL or Verilog files, that you do not need to store)
### sopc_project_name.ptf the list and configuration of components selected in the SOPC gui
### sopc_project_name.bsf Block Symbol file (SOPC component symbol file, especially if you modified it)

# Board Description (if you created your own board, the list is incomplete!)
### board_name/class.ptf

# software source files:
### tbd

######## Quartus II binary files

# hardware binary files
### project_name.sof SRAM Object File

# software binary files

/*
!/*.gitignore
##
!*.qpf
!*.qsf
!*.qws
!*.bdf
!*.vhd
!*.v
!*.ptf
!*.bsf
!**/class.ptf
!*.tbd
!*.sof
## tbd

!*.tcl

 # Star the Repo https://github.com/shaantanu9/SirDeploy
# https://www.linkedin.com/in/shantanu-bombatkar/ 
# End of File
Download alteraquartusii.gitignore

List Of Files and Folders That Get Ignored using this Gitignore code

Above Code Helps ignore following files from alteraquartusii Project

project files:

top level source files:

component source files:

SOPC builder project source files (SOPC builder creates many VHDL or Verilog files, that you do not need to store)

Board Description (if you created your own board, the list is incomplete!)

software source files:

hardware binary files

software binary files

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